Many prior memory storage units are realized using solid state media such as dynamic random access memories (DRAMs), static random access memories (SRAMs), read only memories (ROMs), programmable read only memories (PROMs), erasable programmable read only memories (EPROMs) and electrically erasable programmable read only memories (EEPROMs). As the capacity of solid state memory storage units increases, the number of bits required to uniquely address each memory location also increases.
Many prior computer systems mitigate this problem by manipulating pointers to physical addresses rather than the physical addresses themselves. These pointers are typically represented using fewer bits than the physical addresses themselves. However, once the value represented by the pointer must be read the pointer must be converted to a physical address. One typical means of converting a pointer, or logical address, to a physical address is a translation table. A translation table stores a physical address for each pointer. The required width of a translation table increases as the number of bits required to uniquely address each memory location increases. The width of a translation table is a particular concern when it is to be realized using commercially available solid state memory devices and cost is an issue. Many commercially available memories are byte wide, that is they store data in 8 bit units. Consequently, some amount of memory is wasted when the number of bits of a physical address is not a multiple of eight.